| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| darklife/darkriscv | VerilogSystemVerilogTeX | 1.7k | +10 | 257 | +2 |
| HiPhish/rainbow-delimiters.nvim | LuaSchemeSystemVerilog | 213 | +10 | 10 | 0 |
| renode/renode | RobotFrameworkC#Python | 1.3k | +8 | 227 | +2 |
| RobertPeip/Mister64 | VHDLVerilogSystemVerilog | 112 | +8 | 10 | +1 |
| lowRISC/opentitan | SystemVerilogCPython | 2k | +7 | 601 | +1 |
| openhwgroup/cva6 | SystemVerilogCAssembly | 1.8k | +7 | 549 | +1 |
| black-parrot/black-parrot | SystemVerilogPythonObjective-C | 449 | +6 | 168 | 0 |
| analogdevicesinc/hdl | VerilogTclMakefile | 1.2k | +5 | 1.4k | +3 |
| newaetech/chipwhisperer | VHDLCPython | 945 | +4 | 266 | +2 |
| pulp-platform/common_cells | SystemVerilogTclC++ | 356 | +4 | 117 | +2 |
| olofk/serv | VerilogPythonTcl | 1.1k | +4 | 155 | +1 |
| mirkat1206/2021_Spring_NCTU_ICLAB | VerilogSystemVerilogPython | 110 | +4 | 26 | 0 |
| Digital-EDA/Digital-IDE | VerilogJavaScriptC++ | 72 | +4 | 4 | +1 |
| pulp-platform/pulpissimo | SystemVerilogCTcl | 318 | +3 | 146 | +1 |
| PacktPublishing/Learn-FPGA-Programming | VHDLVerilogV | 133 | +3 | 60 | +1 |
| aolofsson/oh | VerilogTclC | 1k | +2 | 268 | +1 |
| MiSTer-devel/S32X_MiSTer | SystemVerilogVerilogVHDL | 46 | +2 | 15 | +1 |
| antmicro/yosys-systemverilog | VerilogC++Tcl | 80 | +2 | 12 | 0 |
| firedancer-io/firedancer | CSystemVerilogPython | 472 | +2 | 73 | 0 |
| WangXuan95/FPGA-SATA-HBA | SystemVerilogVerilogVHDL | 57 | +2 | 15 | 0 |
| nand2mario/nestang | VerilogSystemVerilogC++ | 180 | +2 | 17 | 0 |
| splinedrive/kianRiscV | AGS ScriptAssemblyC | 312 | +2 | 22 | 0 |
| chipsalliance/synlig | VerilogC++Tcl | 80 | +2 | 12 | 0 |
| Xilinx/Vitis_Accel_Examples | MakefileC++SystemVerilog | 436 | +1 | 190 | 0 |
| EttusResearch/uhd | VerilogC++C | 844 | +1 | 620 | +1 |