| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| ghdl/ghdl | VHDLAdaC | 1.9k | +7 | 314 | 0 |
| EttusResearch/uhd | VerilogC++C | 774 | +2 | 591 | +1 |
| analogdevicesinc/hdl | VerilogTclMakefile | 1.1k | +1 | 1.3k | +2 |
| MiSTer-devel/PSX_MiSTer | VHDLVerilogSystemVerilog | 151 | 0 | 41 | 0 |
| aws/aws-fpga | VHDLSystemVerilogV | 1.3k | 0 | 506 | 0 |
| OSVVM/OSVVM | VHDLTcl | 189 | 0 | 50 | 0 |
| SpinalHDL/SpinalHDL | ScalaVerilogPython | 1.2k | 0 | 256 | 0 |
| pConst/basic_verilog | VerilogVHDLHTML | 1.1k | 0 | 273 | 0 |
| greatscottgadgets/hackrf | CCMakePython | 5.3k | 0 | 1.4k | 0 |
| slaclab/surf | VHDLPythonSystemVerilog | 208 | 0 | 43 | 0 |
| tomas-fryza/digital-electronics-1 | VHDLTclShell | 49 | 0 | 235 | 0 |
| newaetech/chipwhisperer | VHDLCAssembly | 850 | 0 | 253 | 0 |
| VUnit/vunit | VHDLPythonOther | 600 | 0 | 226 | 0 |
| opencomputeproject/Time-Appliance-Project | VHDLTclC | 1.2k | 0 | 80 | 0 |
| cxlisme/FPGA-proj | VHDLVerilogV | 117 | 0 | 32 | 0 |
| songshangru/BIT-CS-Learning | VHDLVerilogJava | 103 | 0 | 45 | 0 |
| KULeuven-COSIC/CryptoNightHaven-FPGA-miner | VHDLVerilogTcl | 6 | 0 | 3 | 0 |
| jhshi/openofdm | VerilogVHDLOther | 269 | 0 | 149 | 0 |
| stnolting/neorv32 | VHDLCMakefile | 1.1k | 0 | 154 | 0 |
| pulp-platform/apb_uart | VHDLSystemVerilogTcl | 5 | 0 | 20 | 0 |
| MiSTer-devel/Arcade-Cave_MiSTer | ScalaVerilogSystemVerilog | 68 | 0 | 17 | 0 |
| yunwei37/ZJU-CS-GIS-ClassNotes | Jupyter NotebookVerilogC | 624 | 0 | 143 | 0 |
| MiSTer-devel/S32X_MiSTer | SystemVerilogVerilogVHDL | 41 | 0 | 13 | 0 |
| MiSTer-devel/ao486_MiSTer | VerilogCC++ | 203 | 0 | 57 | 0 |
| mjbrown/umn_simaudio | VHDLVerilogTcl | 8 | 0 | 4 | 0 |