SpinalHDL/SpinalHDL

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About SpinalHDL SpinalHDL is: A language to describe digital hardware Compatible with EDA tools, as it generates VHDL/Verilog files Much more powerful than VHDL, Verilog, and SystemVerilog in its syntax and features Much less verbose than VHDL, Verilog, and SystemVerilog Not an HLS, nor based on the event-driven paradigm Only generates what you asked it in a one-to-one way (no black-magic, no black box) Not introducing area/performance overheads in your design (versus a hand-written VHDL/Verilog...