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openhwgroup/cva6
SystemVerilog
C
Tcl
1.7k
+6
505
+4
pulp-platform/axi
SystemVerilog
Stata
Shell
644
+3
183
+1
pulp-platform/common_cells
SystemVerilog
Tcl
C++
289
+2
96
+1
chipsalliance/caliptra-rtl
SystemVerilog
Assembly
C
13
+1
4
+2
pulp-platform/axi_riscv_atomics
SystemVerilog
Stata
Verilog
36
0
9
0
Mixtape-Sessions/Causal-Inference
Stata
R
TeX
77
0
86
0
OpenSourceAP/CrossSection
Stata
R
SAS
443
0
180
0
Daniel-Pailanir/sdid
Stata
TeX
42
0
22
0
paulgp/applied-methods-phd
TeX
R
Stata
1.5k
0
443
0
asjadnaqvi/Stata-schemes
Stata
TeX
129
0
42
0
Mixtape-Sessions/Shift-Share
TeX
R
Stata
35
0
47
0
Mixtape-Sessions/Instrumental-Variables
TeX
R
Stata
60
0
73
0
vikjam/mostly-harmless-replication
Stata
R
Python
499
0
269
0
Mixtape-Sessions/Causal-Inference-1
TeX
HTML
Stata
99
0
83
0
UVVM/UVVM
VHDL
HTML
Python
284
0
79
0
Mixtape-Sessions/Causal-Inference-2
HTML
TeX
Stata
41
0
62
0
MohammadHAbbaspour/CA_Project
VHDL
Batchfile
Stata
0
0
0
0
Mixtape-Sessions/Difference-in-Differences
TeX
Stata
R
32
0
61
0
hdl-util/hdmi
SystemVerilog
Python
Stata
834
0
92
0
JMSLab/xtevent
Stata
HTML
TeX
22
0
9
0
scunning1975/mixtape
TeX
Stata
R
297
0
174
0
VerticalResearchGroup/miaow
Verilog
Stata
C
802
0
217
0
raysalemi/uvmprimer
SystemVerilog
VHDL
Stata
346
0
168
0
chipsalliance/aib-phy-hardware
Verilog
SystemVerilog
Tcl
105
0
28
0
fallingcat/HomebrewGPU
VHDL
Verilog
SystemVerilog
88
0
4
0
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