pulp-platform/axi

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AXI SystemVerilog Modules for High-Performance On-Chip Communication This repository provides modules to build on-chip communication networks adhering to the AXI4 or AXI4-Lite standards. For high-performance communication, we implement AXI4+ATOPs from AXI5. For lightweight communication, we implement AXI4-Lite. We aim to provide a complete end-to-end communication platform, including endpoints such as DMA engines and on-chip memory controllers. Our design goals are: Topology Independence: We provide...