syntacore/scr1

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SCR1 RISC-V Core SCR1 is an open-source and free to use RISC-V compatible MCU-class core, designed and maintained by Syntacore. It is industry-grade and silicon-proven (including full-wafer production), works out of the box in all major EDA flows and Verilator, and comes with extensive collateral and documentation. Key features Open sourced under SHL-license (see LICENSE file) - unrestricted commercial use allowed RV32I or RV32E ISA base + optional RVM and RVC standard extensions Machine privilege...