phoeniX-Digital-Design/phoeniX

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phoeniX RISC-V processor is designed in Verilog HDL based on the 32-bit Base Instrcution Set of RISC-V Instruction Set Architecture and can execute RV32I instructions. Support for other extensions will be covered in the upcoming updates. You can find a full list of RISC-V assembly instructions in the ISA Specifications Documents. The core can be implemented as a softcore CPU on Xilinx 7 Ultrascale/Ultrascale+ series FPGA boards using logic synthesis. This allows flexible integration of the core's...