| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| openwall/john | CVerilogPython | 8.3k | +35 | 1.9k | +3 |
| stellarkey/912_project | HTMLJavaScriptC | 2k | +15 | 485 | 0 |
| RfidResearchGroup/proxmark3 | CLuaVerilog | 3k | +13 | 858 | 0 |
| hneemann/Digital | JavaVerilogAssembly | 3.3k | +13 | 359 | 0 |
| darklife/darkriscv | VerilogSystemVerilogTeX | 1.7k | +10 | 257 | +2 |
| alexforencich/verilog-ethernet | VerilogPythonTcl | 1.7k | +9 | 541 | +4 |
| SI-RISCV/e200_opensource | VerilogCAssembly | 2.4k | +8 | 975 | 0 |
| The-OpenROAD-Project/OpenROAD | VerilogC++Tcl | 986 | +8 | 372 | +3 |
| WangXuan95/FPGA-USB-Device | Verilog | 261 | +8 | 57 | +1 |
| chipsalliance/chisel | ScalaC++Python | 3.2k | +8 | 541 | +2 |
| RobertPeip/Mister64 | VHDLVerilogSystemVerilog | 112 | +8 | 10 | +1 |
| The-OpenROAD-Project/OpenLane | PythonTclDockerfile | 1k | +7 | 330 | +1 |
| chipsalliance/rocket-chip | ScalaPythonC++ | 2.8k | +7 | 1k | +5 |
| DrWaleedAYousef/Teaching | MathematicaVerilogPython | 932 | +6 | 314 | +1 |
| analogdevicesinc/hdl | VerilogTclMakefile | 1.2k | +5 | 1.4k | +3 |
| alexforencich/verilog-axi | VerilogPythonMakefile | 1.1k | +5 | 361 | 0 |
| VerticalResearchGroup/miaow | VerilogStataC | 836 | +5 | 225 | 0 |
| google/fully-homomorphic-encryption | C++StarlarkC | 3.3k | +5 | 266 | 0 |
| sheldonucr/ucr-eecs168-lab | Verilog | 466 | +5 | 31 | 0 |
| sipeed/TangPrimer-20K-example | GLSLVVerilog | 107 | +5 | 20 | +1 |
| newaetech/chipwhisperer | VHDLCPython | 945 | +4 | 266 | +2 |
| olofk/serv | VerilogPythonTcl | 1.1k | +4 | 155 | +1 |
| lnis-uofu/OpenFPGA | VerilogC++Tcl | 643 | +4 | 134 | 0 |
| mirkat1206/2021_Spring_NCTU_ICLAB | VerilogSystemVerilogPython | 110 | +4 | 26 | 0 |
| Digital-EDA/Digital-IDE | VerilogJavaScriptC++ | 72 | +4 | 4 | +1 |