| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| openwall/john | CVerilogPython | 8.3k | +35 | 1.9k | +3 |
| open-sdr/openwifi | CShellPython | 3.3k | +16 | 551 | +1 |
| darklife/darkriscv | VerilogSystemVerilogTeX | 1.7k | +10 | 257 | +2 |
| WangXuan95/FPGA-USB-Device | Verilog | 261 | +8 | 57 | +1 |
| openhwgroup/cva6 | SystemVerilogCAssembly | 1.8k | +7 | 549 | +1 |
| analogdevicesinc/hdl | VerilogTclMakefile | 1.2k | +5 | 1.4k | +3 |
| SpinalHDL/VexRiscv | AssemblyScalaC++ | 2k | +4 | 354 | 0 |
| olofk/serv | VerilogPythonTcl | 1.1k | +4 | 155 | +1 |
| stnolting/neorv32 | VHDLCMakefile | 1.2k | +4 | 172 | 0 |
| PaddlePaddle/Paddle-Lite | C++PythonC | 6.7k | +4 | 1.6k | -2 |
| lnis-uofu/OpenFPGA | VerilogC++Tcl | 643 | +4 | 134 | 0 |
| ultraembedded/biriscv | VerilogC++Other | 665 | +2 | 125 | +1 |
| WangXuan95/FPGA-SATA-HBA | SystemVerilogVerilogVHDL | 57 | +2 | 15 | 0 |
| nand2mario/nestang | VerilogSystemVerilogC++ | 180 | +2 | 17 | 0 |
| WangXuan95/FPGA-MPEG2-encoder | VerilogBatchfile | 61 | +2 | 10 | 0 |
| splinedrive/kianRiscV | AGS ScriptAssemblyC | 312 | +2 | 22 | 0 |
| nickg/nvc | VHDLCM4 | 532 | +2 | 75 | 0 |
| WangXuan95/FPGA-Gzip-compressor | VerilogPythonOther | 57 | +2 | 11 | 0 |
| ulixxe/usb_cdc | Verilog | 124 | +2 | 5 | 0 |
| Xilinx/Vitis_Accel_Examples | MakefileC++SystemVerilog | 436 | +1 | 190 | 0 |
| EttusResearch/uhd | VerilogC++C | 844 | +1 | 620 | +1 |
| projf/projf-explore | SystemVerilogTclC++ | 455 | +1 | 47 | 0 |
| ultraembedded/cores | VerilogCC++ | 575 | +1 | 185 | +2 |
| RC4ML/FpgaNIC | TeXCC++ | 89 | +1 | 14 | +1 |
| Xilinx/XRT | CC++Python | 470 | +1 | 418 | 0 |