chipsalliance/yosys-f4pga-plugins

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Yosys F4PGA Plugins This repository contains plugins for Yosys developed as part of the F4PGA project. Design introspection plugin Adds several commands that allow for collecting information about cells, nets, pins and ports in the design or a selection of objects. Additionally provides functions to convert selection on TCL lists. Following commands are added with the plugin: get_cells get_nets get_pins get_ports get_count selection_to_tcl_list FASM plugin Writes out the design's fasm features based...