secworks/aes

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

VerilogPythonMakefileTclasicencryptionfpgaaesblock-cipher
This is stars and forks stats for /secworks/aes repository. As of 26 Apr, 2024 this repository has 271 stars and 115 forks.

aes Verilog implementation of the symmetric block cipher AES (NIST FIPS 197). Status The core is completed, has been used in several FPGA and ASIC designs. The core is well tested and mature. Introduction This implementation supports 128 and 256 bit keys. The implementation is iterative and process one 128 block at a time. Blocks are processed on a word level with 4 S-boxes in the data path. The S-boxes for encryption are shared with the key expansion and the core can thus not do key update in parallel...
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