| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| bpadalino/vhdl-format | VHDLShell | 23 | 0 | 2 | 0 |
| xyfJASON/HITSZ-miniRV-1 | VerilogVHDLSystemVerilog | 18 | 0 | 2 | 0 |
| suisuisi/FPGAandGames | VHDLCVerilog | 31 | 0 | 15 | 0 |
| UVVM/UVVM | VHDLHTMLPython | 305 | 0 | 79 | 0 |
| MohammadHAbbaspour/CA_Project | VHDLBatchfileStata | 0 | 0 | 0 | 0 |
| dtatulea/fpga-pong | VHDL | 2 | 0 | 0 | 0 |
| MiSTer-devel/SGB_MiSTer | VHDLVerilogSystemVerilog | 3 | 0 | 2 | 0 |
| abdimuna1/vhdl_coding | VHDL | 0 | 0 | 0 | 0 |
| Haily-Holt-EE/Four-Bit-Multiplier | VHDL | 0 | 0 | 0 | 0 |
| Mazamars312/Analogue_Pocket_Neogeo | VerilogC++SystemVerilog | 235 | 0 | 10 | 0 |
| MiSTer-devel/NeoGeo_MiSTer | VerilogC++SystemVerilog | 123 | 0 | 75 | 0 |
| nandland/spi-master | VHDLVerilogSystemVerilog | 176 | 0 | 84 | 0 |
| texane/vhdl | VHDLCMakefile | 10 | 0 | 7 | 0 |
| ALXCO-Hardware/squareboi | C++PythonVHDL | 38 | 0 | 2 | 0 |
| agg23/analogue-pong | VerilogVHDLTcl | 59 | 0 | 2 | 0 |
| atrac17/Toaplan2 | VerilogVHDLSystemVerilog | 8 | 0 | 3 | 0 |
| EEVengers/ThunderScope | VHDLVerilogSystemVerilog | 458 | 0 | 116 | 0 |
| nullobject/openfpga-tecmo | ScalaVerilogVHDL | 44 | 0 | 1 | 0 |
| raysalemi/uvmprimer | SystemVerilogVHDLStata | 393 | 0 | 186 | 0 |
| stnolting/neorv32-verilog | VerilogVHDLShell | 28 | 0 | 8 | 0 |
| jiaowushuang/fpga_cmos_design | VerilogVHDLC | 25 | 0 | 15 | 0 |
| agg23/analogue-arduboy | VerilogTclSystemVerilog | 51 | 0 | 2 | 0 |
| hamsternz/MMCM_GPSDO | VHDL | 27 | 0 | 1 | 0 |
| MiSTer-devel/PokemonMini_MiSTer | SystemVerilogVerilogVHDL | 7 | 0 | 2 | 0 |
| ztachip/ztachip | VHDLVerilogSystemVerilog | 162 | 0 | 22 | 0 |