| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| MoonbaseOtago/vroom | VerilogSystemVerilogHTML | 406 | 0 | 16 | 0 |
| slaclab/surf | VHDLPythonSystemVerilog | 248 | 0 | 47 | 0 |
| IObundle/iob-cache | VerilogMakefileTeX | 122 | 0 | 29 | 0 |
| pulp-platform/fpu_div_sqrt_mvp | SystemVerilog | 13 | 0 | 12 | 0 |
| pulp-platform/riscv-dbg | SystemVerilogCMakefile | 150 | 0 | 61 | 0 |
| pulp-platform/apb_timer | SystemVerilog | 9 | 0 | 20 | 0 |
| pulp-platform/register_interface | SystemVerilog | 68 | 0 | 18 | 0 |
| pulp-platform/fpnew | SystemVerilogPython | 311 | 0 | 87 | 0 |
| cxlisme/FPGA-proj | VHDLVerilogV | 145 | 0 | 38 | 0 |
| pulp-platform/axi_mem_if | SystemVerilog | 27 | 0 | 21 | 0 |
| pulp-platform/axi2apb | SystemVerilog | 12 | 0 | 19 | 0 |
| openhwgroup/core-v-mcu | SystemVerilogCC++ | 146 | 0 | 51 | 0 |
| openhwgroup/cv32e40p | SystemVerilogCPython | 780 | 0 | 338 | 0 |
| KULeuven-COSIC/CryptoNightHaven-FPGA-miner | VHDLVerilogTcl | 6 | 0 | 2 | 0 |
| sifive/fpga-shells | ScalaVerilogSystemVerilog | 131 | 0 | 63 | 0 |
| IObundle/iob-axi | VerilogPythonMakefile | 3 | 0 | 4 | 0 |
| pulp-platform/apb_uart | VHDLSystemVerilogTcl | 6 | 0 | 20 | 0 |
| MiSTer-devel/Arcade-Cave_MiSTer | ScalaVerilogSystemVerilog | 73 | 0 | 17 | 0 |
| pulp-platform/axi_node | SystemVerilog | 17 | 0 | 35 | 0 |
| enjoy-digital/litex | CPythonSystemVerilog | 2.4k | 0 | 480 | 0 |
| pulp-platform/tech_cells_generic | SystemVerilogShellTcl | 24 | 0 | 23 | 0 |
| ucb-bar/berkeley-hardfloat | ScalaC++C | 230 | 0 | 78 | 0 |
| ucb-bar/testchipip | ScalaC++Verilog | 64 | 0 | 56 | 0 |
| hughperkins/VeriGPU | SystemVerilogC++Python | 418 | 0 | 50 | 0 |
| chipsalliance/Cores-SweRV-EL2 | SystemVerilogPythonPerl | 194 | 0 | 55 | 0 |