This is stars and forks stats for /ultraembedded/openlogicbit repository. As of 07 May, 2024 this repository has 81 stars and 8 forks.
open-logic-bit Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers. Github: https://github.com/ultraembedded/openlogicbit Aims A logic analyzer project which aims to provide reliable, high speed (100MHz+), large capture depth, open-source gateware that can be used on a FPGA development board you already own, or as replacement gateware for commercial logic analysers that do not work with open-source tools such as sigrok. This...
open-logic-bit Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers. Github: https://github.com/ultraembedded/openlogicbit Aims A logic analyzer project which aims to provide reliable, high speed (100MHz+), large capture depth, open-source gateware that can be used on a FPGA development board you already own, or as replacement gateware for commercial logic analysers that do not work with open-source tools such as sigrok. This...
| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| sbourdeauducq/serdes-tdc | VerilogCAssembly | 14 | 0 | 7 | 0 |
| efabless/caravel-gf180mcu | VerilogTclMakefile | 7 | 0 | 7 | 0 |
| Shiotsukikaedesari/three-vis-display-editor | VueJavaScriptLess | 172 | 0 | 48 | 0 |
| vermaseren/form | CC++Visual Basic 6.0 | 946 | 0 | 112 | 0 |
| markjprice/cs11dotnet7 | C#HTMLCSS | 500 | 0 | 182 | 0 |
| AirenSoft/OvenMediaEngine | C++ShellC | 2.3k | 0 | 972 | 0 |
| input-output-hk/hydra | HaskellTeXShell | 224 | 0 | 80 | 0 |
| rumeysakdogan/DevOps_Workshop | HCLJavaScriptPython | 18 | 0 | 52 | 0 |
| yadav-avnish/aps-fault-detection | Jupyter NotebookPythonOther | 30 | 0 | 125 | 0 |
| dataprofessor/code | Jupyter NotebookOther | 818 | +3 | 1.4k | +1 |