repo | techs | stars | weekly | forks | weekly |
---|---|---|---|---|---|
ultraembedded/cores | VerilogCC++ | 575 | +1 | 185 | +2 |
VUnit/vunit | VHDLPythonOther | 645 | 0 | 236 | 0 |
sudhamshu091/32-Verilog-Mini-Projects | VerilogPython | 342 | 0 | 84 | 0 |
tvlad1234/FakePGA | CMakeC++C | 149 | 0 | 5 | 0 |
repo | techs | stars | weekly | forks | weekly |
---|---|---|---|---|---|
ultraembedded/cores | VerilogCC++ | 575 | +1 | 185 | +2 |
VUnit/vunit | VHDLPythonOther | 645 | 0 | 236 | 0 |
sudhamshu091/32-Verilog-Mini-Projects | VerilogPython | 342 | 0 | 84 | 0 |
tvlad1234/FakePGA | CMakeC++C | 149 | 0 | 5 | 0 |
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