EECS150/fpga_labs_sp23

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EECS151/251A FPGA Labs SP23 For each lab, please find the instructions at /lab#/README.md Resources PYNQ-Z1 Reference Manual: https://reference.digilentinc.com/reference/programmable-logic/pynq-z1/reference-manual Sample XDC file: https://reference.digilentinc.com/_media/reference/programmable-logic/pynq-z1/pynq-z1_c.zip Xilinx 7-series CLB architecture: https://www.xilinx.com/support/documentation/user_guides/ug474_7Series_CLB.pdf Xilinx 7-series Memory Resources: https://www.xilinx.com/support/documentation/user_guides/ug473_7Series_Memory_Resources.pdf Xilinx 7-series DSP Slice: https://www.xilinx.com/support/documentation/user_guides/ug479_7Series_DSP48E1.pdf Vivado 2021.1: https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2021-1.html Vivado Synthesis User Guide 2021.1: https://docs.xilinx.com/v/u/2021.1-English/ug901-vivado-synthesis Vivado Implementation User Guide 2021.1: https://docs.xilinx.com/r/2021.1-English/ug904-vivado-implementation Vivado IDE User Guide 2021.1: https://docs.xilinx.com/r/2021.1-English/ug893-vivado-ide Vivado Simulation (Tutorial) 2021.1: https://docs.xilinx.com/r/2021.1-English/ug937-vivado-design-suite-simulation-tutorial