| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| pulp-platform/snitch | SystemVerilogCRust | 206 | 0 | 44 | 0 |
| riscv-mcu/e203_hbirdv2 | VerilogCAssembly | 923 | 0 | 287 | 0 |
| T-head-Semi/openc910 | VerilogAssemblyC | 906 | 0 | 248 | 0 |
| git/git | CShellPerl | 47.6k | 0 | 25.5k | 0 |
| sqlcipher/sqlcipher | CTclJavaScript | 5.6k | 0 | 1.2k | 0 |
| cockroachdb/cockroach | GoTypeScriptStarlark | 27.9k | 0 | 3.5k | 0 |
| corundum/corundum | VerilogPythonTcl | 1.3k | 0 | 318 | 0 |
| slaclab/surf | VHDLPythonSystemVerilog | 248 | 0 | 47 | 0 |
| tomas-fryza/digital-electronics-1 | VHDLTclOther | 55 | 0 | 229 | 0 |
| SymbiFlow/yosys-f4pga-plugins | VerilogC++Tcl | 76 | 0 | 47 | 0 |
| IObundle/iob-cache | VerilogMakefileTeX | 122 | 0 | 29 | 0 |
| pulp-platform/riscv-dbg | SystemVerilogCMakefile | 150 | 0 | 61 | 0 |
| open-sdr/openwifi-hw | VerilogTclOther | 534 | 0 | 199 | 0 |
| Xilinx/embeddedsw | HTMLCJavaScript | 773 | 0 | 1k | 0 |
| opencomputeproject/Time-Appliance-Project | VHDLTclC | 1.3k | 0 | 89 | 0 |
| redis/redis | CTclPython | 61.8k | 0 | 23k | 0 |
| RetroPie/RetroPie-Setup | ShellPythonJavaScript | 9.8k | 0 | 1.4k | 0 |
| Xilinx/device-tree-xlnx | TclCCartoCSS | 182 | 0 | 186 | 0 |
| cxlisme/FPGA-proj | VHDLVerilogV | 145 | 0 | 38 | 0 |
| chipsalliance/f4pga-examples | VerilogTclOther | 247 | 0 | 72 | 0 |
| huangz1990/redis-3.0-annotated | CTclRuby | 9.7k | 0 | 4.2k | 0 |
| sqlite/sqlite | CTclJavaScript | 4.6k | 0 | 782 | 0 |
| macports/macports-base | TclCM4 | 803 | 0 | 248 | 0 |
| openhwgroup/core-v-mcu | SystemVerilogCC++ | 146 | 0 | 51 | 0 |
| alexforencich/verilog-pcie | VerilogPythonTcl | 769 | 0 | 230 | 0 |