This is stars and forks stats for /ViacheslavL/vhdl_examples repository. As of 02 May, 2024 this repository has 0 stars and 0 forks.
| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| srg320/Saturn_MiSTer | SystemVerilogVerilogVHDL | 138 | 0 | 19 | 0 |
| Ryzee119/OpenXenium | VHDL | 211 | 0 | 42 | 0 |
| spark2k06/PCXT_MiSTer | SystemVerilogVerilogAssembly | 46 | 0 | 15 | 0 |
| MiSTer-devel/GnW_MiSTer | VerilogSystemVerilogVHDL | 12 | 0 | 9 | 0 |
| antonblanchard/microwatt | VerilogVHDLC | 569 | 0 | 96 | 0 |
| jgrahsl/stereovision | VHDLPythonShell | 2 | 0 | 4 | 0 |
| slaclab/epix-hr-core | VHDLPythonTcl | 1 | 0 | 0 | 0 |
| slaclab/axi-pcie-core | VHDLTclSystemVerilog | 14 | 0 | 9 | 0 |
| bxinquan/zynq_cam_isp_demo | VHDLVerilogC | 115 | +1 | 51 | 0 |
| airhdl/spi-to-axi-bridge | VHDLSystemVerilogProlog | 24 | 0 | 6 | 0 |