| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| Xilinx/Vitis_Accel_Examples | MakefileC++SystemVerilog | 436 | +1 | 190 | 0 |
| Xilinx/XRT | CC++Python | 470 | +1 | 418 | 0 |
| Xilinx/Vitis-Tutorials | CC++Tcl | 907 | 0 | 509 | 0 |
| repo | techs | stars | weekly | forks | weekly |
|---|---|---|---|---|---|
| Xilinx/Vitis_Accel_Examples | MakefileC++SystemVerilog | 436 | +1 | 190 | 0 |
| Xilinx/XRT | CC++Python | 470 | +1 | 418 | 0 |
| Xilinx/Vitis-Tutorials | CC++Tcl | 907 | 0 | 509 | 0 |
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