systemverilog-hdl

repo	techs	stars	weekly	forks	weekly
openhwgroup/cva6	SystemVerilogCAssembly	1.8k	+7	549	+1
VUnit/vunit	VHDLPythonOther	645	0	236	0
pulp-platform/axi_mem_if	SystemVerilog	27	0	21	0

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