sequencer/vector

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The RISC-V Long Vector Machine Hardware Generator Welcome to our project (name to be announced). We're developing a RISC-V Long Vector Machine Hardware Generator using the Chisel hardware construction language. It is fully compliant with the RISC-V Vector Spec 1.0, and currently supports the Zvl1024b and Zve32x extensions. The architecture is inspired by the Cray X1 vector machine. Architecture Highlights: The generated vector processors can integrate with any RISC-V scalar core that uses the Out-of-Order...